ETS 2018

General introduction to this year's ETS² sessions.

The ETS² sessions are driven by the industry, and key industrials will introduce topics and issues which are high on their "list of concerns". The introductory presentations per session will take about 45 minutes, the remaining time in each ETS² session is then reserved for discussions. Upon request an indicative time schedule is shown, but be aware that may be changed on the fly.
The format of the sessions is informal, and presentations are not published in whatever form. No recordings are permitted during the ETS² sessions.
This year we have two main topics for the ETS² sessions. One focuses on emerging IEEE standards for AMS circuits, where we are very much looking for feedback from the audience. The other is potentially promising, but is hardly discussed openly: data sharing in the IC supply chain. Technical as well as business issues will be presented and discussed.

Emerging IEEE Standards for DFT of Mixed-Signal ICs

This session addresses practical aspects of three standards being developed by IEEE Working Groups for more efficient testing of mixed-signal ICs. P1687.1 standardizes digital test access via commonly used non-JTAG ports, P1687.2 standardizes the description of analog tests and test access, and P2427 standardizes the reporting of defect coverage achieved by analog tests. These groups hope to complete these standards before ETS'19, and are looking forward to intense discussions and concrete feedback from this ETS² session.

Indicative (time schedule) of the session and the introductory presentations:

11:00 : Jeff REARICK, AMD - USA:	"P1687.1 and .2 - Facilitating systematic testing and test access for all ICs"
11:15 : Stephen SUNTER, Mentor, A Siemens Business - Canada:	"P2427 - Consistent measurement and reporting of analog test coverage"
11:30 : Vladimir ZIVKOVIC, Cadence Design Systems - UK:	"Practical aspects of delivering testable mixed-signal IP blocks: Will new standards help?"
11:45 : General discussion

Data sharing in the IC supply chain, a good or a bad idea?

The 2nd as well as the 3rd ETS² session will discuss the opportunities, challenges, roadblocks etc. on sharing (test)data in the IC supply chain.
This topic is very broad and basically covers all the testing done by the various stakeholders in the complete IC supply chain, from the foundry via the (fabless) IC supplier and the board/system integrator to the system supplier. We specifically try to focus on the (potential) relations between all those dedicated test activities in the supply chain, for instance by trying to answer some questions, like: "why don't we share more information on for instance (test)data results? Doesn't it make sense, or is it too cumbersome and has it all kind challenges and too much roadblocks?"
No doubt that, besides technical aspects, also business issues can/will be discussed.
We will have key reps from a foundry, from (fabless) IC suppliers, from a system company and from a data analysis company. That looks great and will for sure result in interesting sessions and in lively discussions with a hopefully large and active audience.
Topics that will be introduced by the speakers include, but are not limited to, screening defects in package assembly, system level testing (SLT), potential benefits on sharing data as well as challenges and roadblocks, what data can be shared and at what "costs"?, etc.
By the end of the sessions we then may have a pretty good idea on how data sharing could work, if at all, and what it potentially can bring. We hopefully can tell which roadblocks should be removed, and make a head start removing them. It also would be nice to come up with a kind of model or roadmap to make data sharing really happening shortly.

Indicative (time schedule) of the session and the introductory presentations:

ETS² Session 2:

Tuesday May 29, 14:00 - 15:30
14:00 : René SEGERS, ReSeCo - The Netherlands:	"Short introduction to the overall topic of data sharing"
14:15 : Davide APPELLO, STMicroelectronics - Italy:	"Methods for screening defects in package assembly, System Level Testing (SLT)"
14:30 : Harry H. CHEN, MediaTek Inc. - Taiwan:	"Developing a system-based test methodology, experiences so far with the customer and with the ATE supplier. Data sharing needs and opportunities"
14:45 : Robert van RIJSINGE, NXP Semiconductors - The Netherlands	"Experiences and wishes from a fabless company concerning sharing and exchanging data"
15:00 : General discussion

ETS² Session 3:

Tuesday May 29, 16:00 - 17:30
16:00 : John CARULLI, Globalfoundries - USA:	"Experiences and vision from a foundry"
16:15 : Stefan EICHENBERGER, NXP Semiconductors - The Netherlands:	"Can we overcome the challenges and roadblocks of data sharing, and if so how?"
16:30 : Paul SIMON, Qualtera - France:	"Experiences and vision from a data analysis supplier"
16:45 : General discussion