RevLib is an online resource for benchmarks within the domain of reversible and quantum circuit design
Universität Bremen References Cite RevLib Acknowledgements About RevLib
Nested control structure (nestedif)

A circuit with a nested control structure.

Download: nestedif_248.src

Circuit Realizations:

Lib. lines gates costs File Pic. Ref. Notes
MCT+MCF 37 422 6982 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/o additional lines; 16 bit
69 870 14470 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/o additional lines; 32 bit
MCT+MCF 133 611 1475 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/ additional lines; 16 bit
MCT+MCF 261 1251 3011 Download realization No picture available WSSD:2013 Initial approach (Sect. IV); if-stm. w/ additional lines; 32 bit
MCT+MCF 36 428 6996 Download realization No picture available WSSD:2013 Line-aware scheme (Sect. V); 16 bit
MCT+MCF 68 876 14484 Download realization No picture available WSSD:2013 Line-aware scheme (Sect. V); 32 bit
MCT+MCF 38 430 3094 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/o additional lines; 16 bit
MCT+MCF 70 878 6358 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/o additional lines; 32 bit
MCT+MCF 133 611 1475 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/ additional lines; 16 bit
MCT+MCF 261 1251 3011 Download realization No picture available WSSD:2013 Cost-aware scheme (Sect. VI) if-stm. w/ additional lines; 32 bit
MCT+MCF 37 436 3108 Download realization No picture available WSSD:2013 Cost- & Line-aware scheme; 16 bit
MCT+MCF 69 884 6372 Download realization No picture available WSSD:2013 Cost- & Line-aware scheme; 32 bit
 
legend

 back