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FM-TOOLS 2000 : Call for Participation
[We apologize if you receive multiple copies of this message]
CALL FOR PARTICIPATION :
The 4th Workshop on
Tools for System Design and Verification
Reisensburg Castle near Ulm, Germany
Monday 10 July - Thursday 13 July 2000
The 4th workship on Tools for System Design and Verification (FM-TOOLs 2000)
will take place at the `Reisensburg', a beautiful castle near Ulm in
South Germany from Monday 10 July - Thursday 13 July 2000. We will
have 30 presentations, ranging from tool support for specification
languages, automated test generation, model checking and
interactive verification. To register, please fill the registration
form at the end of this mail and send it to
fmtools@informatik.uni-ulm.de
Rooms at the Reisensburg are limited, and allocated on a first-come
first-serve basis. The room rates given in the form refer to
the Reisensburg only. Additional rooms are available in Guenzburg,
a small town close to the Reisensburg. Travel information
can be found on our WWW page
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* http://www.informatik.uni-ulm.de/pm/fmtools *
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WORKSHOP PROGRAM
Monday, July 10
===============
13.45 - 14.00
Workshop Opening
Session 1 (Timed automata)
--------------------------
14.00 - 14.30
Heinz Treseler, Stefan Kowalewski
An open software architecture for the
verification of industrial controllers
14.30 - 15.00
Timo Aaltonnen, Mika Katara, Risto Pitkänen
DISCO Toolset - The New Generation
15.00 - 15.30
Jürgen Ruf
RAVEN: Real-Time Analyzing and Verification Environment
15.30 - 16.00
Break
Session 2 (Interactive Verification I)
--------------------------------------
16.30 - 17.00
W.Reif, J. Ruf, G. Schellhorn, T. Vollmer
Do you trust your model checker?
16.00 - 16.30
Werner Stephan, Georg Rock, Andreas Nonnengart
Modelling Realtime in VSE II
17.00 - 17.30
J. Meyer, A. Poetzsch-Heffter
Strategies for the Verification of Object-oriented Programs
Tuesday, July 11
================
Session 1 (Techniques for Specific Data Structures)
---------------------------------------------------
09.00 - 09.30
Alessandro Armando, Silvio Ranise
A Practical Extension Mechanism for Decision Procedures
09.30 - 10.00
Rudolf Berghammer, Thorsten Hoffmann
Modeling Sequences within the RELVIEW System
10.00 - 10.30
Break
Session 2 (Automatic Testing and Reverse Engineering)
-----------------------------------------------------
10.30 - 11.00
Markus Dahlweid, Oliver Meyer, Jan Peleska
Automated Testing with RT-Tester -
Theoretical Issues Driven by Practical Needs
11.00 - 11.30
Lydie Du Bousquet, Hugues Martin
Automatic test generation for Java-Card applets
11.30 - 12.00
Nikolai Mansurov, Djenana Campara, Elena Laskavaya, Igor Ivanov
Formal data mining and visualization at procedure level
12.00 - 14.00
Break
Session 3 (Invited Talk)
------------------------
14.00 - 15.00
Invited Talk
15.00 - 15.30
Break
Session 4 (Specification Languages)
-----------------------------------
15.30 - 16.00
Mark Utting
Data Structures for Z Testing Tools
16.00 - 16.30
Christine Choppy, Pascal Poizat, Jean-Claude Royer
The Korrigan Environment
16.30 - 17.00
Jan Rothe, Hendrik Tews, Bart Jacobs
The Coalgebraic Class Specification Language CCSL
Wednesday, July 12
==================
Session 1 (Program generation)
------------------------------
09.00 - 09.30
Frank Derichsweiler, Wolfram Kahl
Program Generation via Declarative Term Graph Attribution
09.30 - 10.00
John Crossley, Iman Poernomo
Fred: An approach to generating real, correct,
reusable programs from proofs
10.00 - 10.30
Break
Session 2 (Abstraction Techniques)
----------------------------------
10.30 - 11.00
Hui Shi
Java2CSP: A System for Verifying Concurrent Java Programs
11.00 - 11.30
K. Baukus, Y. Lakhnech, K. Stahl
Using PAX to Verify Parameterized Networks
11.30 - 12.00
Dominique Cansell, Dominique Mery, Stephan Merz
Verifying Reactive Systems Using Predicate Diagrams
12.00 - 14.00
Break
Session 3 (Model Checking)
--------------------------
14.00 - 14.30
Christoph Meinel, Christian Stangier
Accelerating Techniques for OBDD-based
Formal Verification of Sequential Systems
14.30 - 15.00
Martin Leucker
Parallel Model Checking for the Alternation-Free mu-Calculus
15.00 - 15.30
G. KwonK
Model Checking Statecharts with Keeping Hierarchies
15.30 - 16.00
Break
Session 4 (Interactive Verification II)
---------------------------------------
16.00 - 16.30
Wolfgang Goerigk
Reflections on Ken Thompson's 'Reflections on Trusting Trust'
16.30 - 17.00
Rimvydas Ruksenas
Refinement Tool in the Synthesis of Asynchronous Circuits
17.00 - 17.30
Thomas Kaiser, Bernd Fischer, Werner Struckmann
MOPS: Verifying Modula-2 programs specified in VDM-SL
Thursday, July 13
=================
Session 1 (UML)
---------------
09.00 - 09.30
Nasreddine Aoumeur, Gunter Saake
A Sound Integration of Some UML Structural and Behavioural Diagrams Using Rewriting Logic
09.30 - 10.00
Wolfgang Ahrendt, Thomas Baar, Bernhard Beckert,
Martin Giese, Elmar Habermalz, Reiner Hähnle, Wolfram Menzel, Peter H. Schmitt
The KeY Approach: Integrating Object-oriented Design and Formal Verification
10.00 - 10.30
Break
Session 2 (Various Topics)
--------------------------
10.30 - 11.00
R. Castelló, R. Mili, I.G. Tollis, V. Benson
On the Automatic Visualization of Statecharts: The ViSta tool
11.00 - 11.30
Reinhard Budde, Axel Poigné, Karl-Heinz Sylla
Synchronous Object-Oriented Programming: sE2.0
11.30 - 12.00
Harald Sack, Christoph Meinel
Functional Extension of Decision Diagrams in Practice
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% Options (Accomodation, Fees etc.) %
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% Conference Fee %
% (incl. technical report) 70 DM %
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% Accomodation at the Reisensburg %
% (from Dinner on July 10 %
% until Breakfast on July 13) 459 DM %
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% ( ) Early arrival: room + Breakfast %
% (from July 9 to July 10) 112 DM %
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% ( ) Additional Lunch on July 10 27 DM %
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% ( ) Additional Lunch on July 13 27 DM %
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